Magnetic Memory Devices Including Conductive Capping Layers

ABSTRACT

A magnetic memory device includes a first magnetic layer having opposing sidewalls, a tunnel barrier layer on the first magnetic layer, the tunnel barrier layer having a top surface and having opposing sidewalls aligned with the opposing sidewalls of the first magnetic layer, and a second magnetic layer on the tunnel barrier layer, the second magnetic layer having a bottom surface that is narrower than the top surface of the tunnel barrier layer and opposing sidewalls that are spaced apart from the opposing sidewalls of the tunnel barrier layer. A conductive capping layer having opposing sidewalls aligned with the opposing sidewalls of the second magnetic layer is on the second magnetic layer.

CLAIM OF PRIORITY

This application is a divisional of U.S. patent application Ser. No.11/350,545 which claims priority under 35 U.S.C. § 119 from KoreanPatent Application No. 2005-32001, filed on Apr. 18, 2005 in the KoreanIntellectual Property Office, the disclosure of which is incorporatedherein by reference as if set forth in its entirety.

FIELD OF THE INVENTION

The present invention relates to methods of forming semiconductordevices and, more particularly, to methods of forming semiconductormemory devices and resulting semiconductor memory devices.

BACKGROUND

A magnetic memory device is a kind of a non-volatile memory device inwhich data is programmed or erased using a magnetic field. With thepotential benefits of high speed, low density, and/or non-volatility,magnetic memory devices are increasingly becoming attractive as novelmemory devices.

A typical magnetic memory device employs a magnetic tunnel junction(MTJ) pattern as a data storage element. The resistance of the MTJpattern varies with an external magnetic field, which leads to a changein the amount of current flowing through the MTJ pattern. The change inthe amount of the current is sensed to indicate a logic “1” or a logic“0”.

Generally, an MTJ pattern includes two magnetic layers and a tunnelbarrier layer interposed therebetween. One of the magnetic layers has achangeable magnetization orientation when a magnetic field is applied,while the other has a fixed magnetization orientation even when amagnetic field is applied. Therefore, the two magnetic layers may havethe same magnetization orientation or opposite magnetizationorientations. The resistance of the MTJ pattern in which the twomagnetic layers have the same magnetization orientation is lower thanwhen the two magnetic layers are in different magnetizationorientations.

A method of forming a conventional magnetic memory device will now bedescribed with reference to FIG. 1 and FIG. 2.

Referring to FIG. 1, a bottom magnetic layer 2, a tunnel barrier layer3, a top magnetic layer 4, and a conductive capping layer 5 are formedin order on a substrate 1. The bottom magnetic layer 2 has a fixedmagnetization orientation. That is, the magnetization orientation of thebottom magnetic layer 2 may be continuously fixed even when an externalmagnetic field is applied. Furthermore, the magnetization orientation ofthe top magnetic layer 4 is changeable with an external magnetic field.

Referring to FIG. 2, the conductive capping layer 5, the top magneticlayer 4, the tunnel barrier layer 3, and the bottom magnetic layer 2 aresuccessively patterned to form a bottom magnetic pattern 2 a, a tunnelbarrier pattern 3 a, a top magnetic pattern 4 a, and a capping pattern 5a that are stacked in order on the substrate 1. The bottom magneticpattern 2 a, the tunnel barrier pattern 3 a, and the top magneticpattern 4 a form a MTJ pattern.

During an etch process to form the MTJ pattern, an etch byproduct 6 maybe produced on a sidewall of the MTJ pattern. Since the etch byproduct 6may include conductive materials from the bottom and/or top magneticpatterns 2 a and 5 a, it may become conductive, which may cause ashort-circuit between the bottom and top magnetic patterns 2 a and 5 a.Thus, the desired property of the MTJ pattern (namely, that theresistance varies with the magnetization orientations of the magneticpatterns 2 a and 5 a) may be lost, which may result in a malfunction ofthe magnetic memory device.

SUMMARY

Some embodiments of the present invention provide methods of formingmagnetic memory devices. In some embodiments, a first magnetic layer, atunnel barrier layer, and a second magnetic layer are sequentiallyformed on a semiconductor substrate. The first magnetic layer may have afixed magnetization orientation, and the second magnetic layer may havea changeable magnetization orientation. A conductive capping pattern isformed on the second magnetic layer, and portions of the second magneticlayer are oxidized using the conductive capping pattern as a mask, toform an unoxidized second magnetic pattern that is disposed below theconductive capping pattern. The oxidized portion of the second magneticlayer is removed to expose the tunnel barrier layer and oppositesidewalls of the second magnetic pattern. The second magnetic layer mayinclude a ferromagnetic material such as iron (Fe), nickel (Ni), and/orcobalt (Co).

In some embodiments, a first magnetic layer, a tunnel barrier layer, anda second magnetic layer may be sequentially formed on a substrate. Thefirst magnetic layer may have a fixed magnetization orientation and thesecond magnetic layer may include cobalt-iron-boron (CoFeB). Aconductive capping pattern may be formed on the second magnetic layer,and the second magnetic layer may be oxidized using the conductivecapping pattern as a mask to form a second magnetic pattern that is anunoxidized portion of the second magnetic layer disposed below theconductive capping pattern. The oxidized portion of the second magneticlayer may be removed to expose the tunnel barrier layer and oppositesidewalls of the second magnetic pattern. The exposed tunnel barrierlayer and the first magnetic layer may be successively patterned to forma first magnetic pattern and a tunnel barrier pattern. A second surfaceof the tunnel barrier layer may be larger than a first surface of thesecond magnetic pattern. Removing the oxidized portion of the secondmagnetic layer may be done by means of an etch process using an etch gasincluding argon gas, chlorine gas, and/or oxygen gas.

A magnetic memory device according to some embodiments of the inventionincludes a first magnetic layer having opposing sidewalls, a tunnelbarrier layer on the first magnetic layer, the tunnel barrier layerhaving a top surface and having opposing sidewalls aligned with theopposing sidewalls of the first magnetic layer, and a second magneticlayer on the tunnel barrier layer, the second magnetic layer having abottom surface that may be narrower than the top surface of the tunnelbarrier layer and opposing side surfaces that are spaced apart from theopposing side surfaces of the tunnel barrier layer. A conductive cappinglayer having opposing sidewalls aligned with the opposing sidewalls ofthe second magnetic layer is on the second magnetic layer.

The first magnetic layer may include a pinning layer, a first pinnedlayer, an inversion layer, and a second pinned layer. The first andsecond pinned layers include a ferromagnetic material, the pinning layermay include an antiferromagnetic material configured to fix amagnetization orientation of the first pinned layer, and the inversionlayer may be configured to fix a magnetization orientation of the secondpinned layer to be opposite to the magnetization orientation of thefirst pinned layer. The tunnel barrier layer may include aluminum oxideand/or magnesium oxide.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the invention and are incorporated in and constitute apart of this application, illustrate certain embodiment(s) of theinvention. In the drawings:

FIG. 1 and FIG. 2 are cross-sectional views illustrating operationsassociated with forming a conventional magnetic memory device.

FIG. 3 through FIG. 10 are cross-sectional views illustrating operationsassociated with forming magnetic memory devices according to someembodiments of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

Embodiments of the present invention now will be described more fullyhereinafter with reference to the accompanying drawings, in whichembodiments of the invention are shown. This invention may, however, beembodied in many different forms and should not be construed as limitedto the embodiments set forth herein. Rather, these embodiments areprovided so that this disclosure will be thorough and complete, and willfully convey the scope of the invention to those skilled in the art.Like numbers refer to like elements throughout.

It will be understood that, although the terms first, second, etc. maybe used herein to describe various elements, these elements should notbe limited by these terms. These terms are only used to distinguish oneelement from another. For example, a first element could be termed asecond element, and, similarly, a second element could be termed a firstelement, without departing from the scope of the present invention. Asused herein, the term “and/or” includes any and all combinations of oneor more of the associated listed items.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the invention. Asused herein, the singular forms “a”, “an” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprises,”“comprising,” “includes” and/or “including” when used herein, specifythe presence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this invention belongs. It will befurther understood that terms used herein should be interpreted ashaving a meaning that is consistent with their meaning in the context ofthis specification and the relevant art and will not be interpreted inan idealized or overly formal sense unless expressly so defined herein.

It will be understood that when an element such as a layer, region orsubstrate is referred to as being “on” or extending “onto” anotherelement, it can be directly on or extend directly onto the other elementor intervening elements may also be present. In contrast, when anelement is referred to as being “directly on” or extending “directlyonto” another element, there are no intervening elements present. Itwill also be understood that when an element is referred to as being“connected” or “coupled” to another element, it can be directlyconnected or coupled to the other element or intervening elements may bepresent. In contrast, when an element is referred to as being “directlyconnected” or “directly coupled” to another element, there are nointervening elements present.

Relative terms such as “below” or “above” or “upper” or “lower” or“horizontal” or “vertical” or “top” or “bottom” may be used herein todescribe a relationship of one element, layer or region to anotherelement, layer or region as illustrated in the figures. It will beunderstood that these terms are intended to encompass differentorientations of the device in addition to the orientation depicted inthe figures. For example, a layer designated as a “top” layer of astructure may become a bottom layer if the structure is inverted.

Embodiments of the invention are described herein with reference tocross-section illustrations that are schematic illustrations ofidealized embodiments (and intermediate structures) of the invention.The thickness of layers and regions in the drawings may be exaggeratedfor clarity. Additionally, variations from the shapes of theillustrations as a result, for example, of manufacturing techniquesand/or tolerances, are to be expected. Thus, embodiments of theinvention should not be construed as limited to the particular shapes ofregions illustrated herein but are to include deviations in shapes thatresult, for example, from manufacturing. For example, an implantedregion illustrated as a rectangle will, typically, have rounded orcurved features and/or a gradient of implant concentration at its edgesrather than a discrete change from implanted to non-implanted region.Likewise, a buried region formed by implantation may result in someimplantation in the region between the buried region and the surfacethrough which the implantation takes place. Thus, the regionsillustrated in the figures are schematic in nature and their shapes arenot intended to illustrate the actual shape of a region of a device andare not intended to limit the scope of the invention.

Referring to FIG. 3, device isolation layers (not shown) are formed in asemiconductor substrate 100 to define active regions. A gate electrode104 is formed to cross over the active regions with a gate insulator 102interposed therebetween. The gate insulator 102 may be made of siliconoxide and/or a high-k dielectric, such as metal oxide (e.g., hafniumoxide and/or aluminum oxide) having a higher dielectric constant thansilicon oxide. The gate electrode 104 may include a conductive material,such as doped polysilicon, metal (e.g., tungsten or molybdenum),conductive metal nitride (e.g., titanium nitride or tantalum nitride),and/or metal silicide (e.g., tungsten silicide or cobalt silicide).

Using the gate electrode 104 as a mask, impurity ions are implanted toform impurity diffusion layers 106 at active regions on opposite sidesof the gate electrode 104. The impurity diffusion layer 106 maycorrespond to source/drain regions, and the gate electrode 104 and theimpurity diffusion layer 106 may together form a metal oxidesemiconductor (MOS) transistor. An insulative capping pattern (notshown) may be formed on the gate electrode 104. Further, a gate spacer(not shown) may be formed on opposite sidewalls of the gate electrode104.

A lower interlayer dielectric 108 is formed on the surface of thesemiconductor substrate 100 including the gate electrode 104 and theimpurity diffusion layer 106. A top surface of the lower interlayerdielectric 108 may be planarized. The lower interlayer dielectric 108may include, for example, silicon oxide.

A digit line 110 is formed on the lower interlayer dielectric 108. Thedigit line 110 may be disposed in parallel with the gate electrode 104.In order to possibly provide enhanced integration density, the digitline 110 may overlap the gate electrode 104. The digit line 110 and thegate electrode 104 are insulated from one another by the lowerinterlayer dielectric 108. A middle interlayer dielectric 112 is formedon an entire surface of the semiconductor substrate 100 including thedigit line 110. A top surface of the middle interlayer dielectric 112may be planarized. The middle interlayer dielectric 112 may include, forexample, silicon oxide.

Referring to FIG. 4, a contact hole 114 is formed by successivelypenetrating the middle and lower interlayer dielectrics 112 and 108disposed at one side of the digit line 110 to expose the impuritydiffusion layer 106. A contact plug 116 is formed to at least partiallyfill the contact hole 114. The contact plug 116 and the digit line 110are spaced to be electrically insulated from each other.

In order to reduce the aspect ratio of the contact hole 114, the contacthole 114 may be formed to expose a buffer pattern (not shown) that isformed between the lower and the middle interlayer dielectrics 108 and112 and that is spaced apart from the digit line 110. In that case, thecontact plug 116 is electrically connected to the buffer pattern. Thebuffer pattern may be made of the same material as the digit line 110.The buffer pattern is connected to a top surface of a lower contact plug(not shown), which is coupled to the impurity diffusion layer 106,through the lower interlayer dielectric 108.

A bottom electrode layer 118, a bottom magnetic layer 128, a tunnelbarrier layer 130, a top magnetic layer 132, and a conductive cappinglayer 135 are sequentially formed on the middle interlayer dielectric112. The bottom electrode layer 118 is electrically connected to a topsurface of the contact plug 116. In order to provide a relatively lowreactivity, the bottom electrode layer 118 may include a conductivematerial that may act as a barrier layer. For example, the bottomelectrode layer 118 may include a conductive metal nitride such as, forexample, titanium nitride, tantalum nitride and/or tungsten nitride.

The bottom magnetic layer 128 may have a fixed magnetizationorientation. The bottom magnetic layer 128 may include a pinning layer120, a first pinned layer 122, an inversion layer 124, and a secondpinned layer 126 that may be stacked in order on the bottom electrodelayer 118.

Each of the first and second pinned layers 122 and 126 is made of aferromagnetic material including, for example, iron (Fe), nickel (Ni),and/or cobalt (Co). In some embodiments, each of the first and secondpinned layers 122 and 126 may include CoFe, NiFe and/or CoFeB. Of thefirst and second pinned layers 122 and 126, the second pinned layer 126disposed near the top magnetic layer 132 may be thinner than the firstpinned layer 122.

The pinning layer 120 includes a material capable of fixing themagnetization orientation of the first pinned layer 122 in onedirection. Accordingly, the pinning layer 120 may include anantiferromagnetic material such as, for example, FeMn, IrMn, PtMn, MnO,MnS, MnTe, MnF₂, FeF₂, FeCl₂, NiO, and/or Cr. The inversion layer 124may include a material capable of fixing the magnetization orientationof the second pinned layer 126 to be opposite to the magnetization ofthe first pinned layer 122. Accordingly, the inversion layer 124 mayinclude, for example, ruthenium (Ru), iridium (Ir), and/or rhodium (Rh).

The tunnel barrier layer 130 may include, for example, aluminum oxideand/or magnesium oxide. The top magnetic layer 132 may include amaterial whose magnetic orientation is changeable with an externalmagnetic field. Accordingly, the top magnetic layer 132 may include aferromagnetic material such as, for example, iron (Fe), nickel (Ni),and/or cobalt (Co). Namely, the top magnetic layer 132 may include, forexample, CoFe, NiFe and/or CoFeB.

The conductive capping layer 135 may include a conductive metal nitride,such as titanium nitride, tantalum nitride and/or tungsten nitride.Referring to FIG. 5, the conductive capping layer 135 may be patternedto form a conductive capping pattern 135 a on the top magnetic layer132. The conductive capping pattern 135 a may be disposed to overlap thedigit line 110. In regions other than the region in which the conductivecapping pattern 135 a is formed, the top magnetic layer 132 is exposed.The conductive capping pattern 135 a may form an island-shaped pattern.In particular, the conductive capping pattern 135 a may appearrectangular when viewed from above.

Referring to FIG. 6 and FIG. 7, an oxidation process is performed on thesemiconductor substrate 100 including the conductive capping pattern 135a to oxidize the top magnetic layer 132. That is, using the conductivecapping pattern 135 a as a mask, the top magnetic layer 132 may beoxidized. As a result, the top magnetic layer 132 may be segmented intoan unoxidized portion 132 a and an oxidized portion 132 b. Theunoxidized portion 132 a is disposed below the conductive cappingpattern 135 a, and the oxidized portion 132 b may surround theunoxidized portion 132 a.

The unoxidized portion 132 a defines as a top magnetic pattern 132 a.Since the top magnetic layer 132 is made of a ferromagnetic material,the top magnetic pattern 132 a may form a ferromagnetic pattern. Theoxidized portion 132 b of the top magnetic layer 132 is an oxidizedferromagnetic material 132 b. Hereinafter, the oxidized portion 132 b ofthe top magnetic layer may be referred to as the oxidized ferromagneticmaterial 132 b.

The oxidized portion 132 b is removed by means of an etch process toexpose sidewalls of the top magnetic pattern 132 a and the tunnelbarrier layer 130. In some embodiments, the oxidized portion 132 b maybe removed completely. Using the conductive capping pattern 135 a as amask, the top magnetic pattern 132 a is formed to overlap the digit line110. An etch gas used to etch the oxidized ferromagnetic material 132 bmay include, for example, at least argon gas (Ar) and chlorine gas. Inaddition, the etch gas may further include oxygen gas. In the etchprocess, an inflow rate of the chlorine gas may be much lower than thatof the argon gas. Specifically, the inflow rate of the chlorine gas mayequal about to 0.1 to 2.0 percent of the inflow rate of the argon gas.Further, the etch process may utilize a bias power of from about 30 toabout 70 watts.

There may be a very high etch selectivity between the oxidizedferromagnetic material 132 b and the tunnel barrier layer 130. Inparticular, the etch selectivity between the oxidized ferromagneticmaterial 132 b and the tunnel barrier layer 130 may be higher than theetch selectivity between the top magnetic pattern (i.e., unoxidizedferromagnetic) 132 a and the tunnel barrier layer 130. This may bebecause oxygen elements in the oxidized ferromagnetic 132 b may reducethe coupling of other elements therein. Therefore, although the tunnelbarrier layer 130 may have a very small thickness of about 10 angstroms,the oxidized ferromagnetic material 132 b may be removed using thetunnel barrier layer 130 as an etch-stop layer. Accordingly, the bottommagnetic layer 128 below the tunnel barrier layer 130 may not be exposedin the etch process. As a result, a short-circuit may not occur betweenthe top magnetic pattern 132 a and the bottom magnetic layer 128 even ifetch byproducts are produced in the etch process.

A test was conducted to confirm an etch selectivity between an oxidizedferromagnetic material and a tunnel barrier layer, and an etchselectivity between a ferromagnetic material and the tunnel barrierlayer. Samples 1, 2, and 3 were prepared for the test. A layer of Al₂O₃layer acting as a tunnel barrier layer, a layer of CoFeB beingferromagnetic, and a layer of CoFeBO_(x) being oxidized ferromagneticwere formed in the samples 1, 2, and 3, respectively. Under the sameetch recipe, an etch process was performed for the samples 1, 2, and 3.

The etch process applied to the test used an etch gas including argongas, chlorine gas, and oxygen gas. In the etch recipe for the etchprocess, an inner pressure of a process chamber was 10 mTorr; an inflowrate of the argon gas was 200 sccm, an inflow rate of the chlorine gaswas 1 sccm, and an inflow rate of the oxygen gas was 20 sccm. Sourcepower for plasmatically activating these etch gases was 1,500 watts, andbias power applied to a chuck on which these samples are loaded was 50watts. Etch rates of the above material layers are shown in the table[TABLE 1].

TABLE 1 Kind of Layers Etch Rate (Å/sec) Al₂O₃ 0.0014 CoFeB 0.0260CoFeBO_(x) 0.0339

As shown in the table [TABLE 1], CoFeBO_(x) of the sample 3 has a higheretch rate than CoFeB of the sample 2, i.e., CoFeBO_(x) is etched fasterthan CoFeB. Etch selectivities between these material layers werecomputed using the etch rates of the table [TABLE 1] and are shown inthe table [TABLE 2].

TABLE 2 Etch Selectivity CoFeB/Al₂O₃ 18.5 CoFeBO_(x)/Al₂O₃ 24.2

As shown in the table [TABLE 2], an etch selectivity between CoFeBO_(x)and Al₂O₃ is 24.2, which is higher than an etch selectivity (18.5)between CoFeB and Al₂O₃.

As evidenced by the above-described test, an oxidized ferromagneticmaterial may have a higher etch rate than an unoxidized ferromagneticmaterial. Therefore, an etch selectivity between the oxidized portion132 b of the top magnetic layer 132 and the tunnel barrier layer 130 mayrelatively high. As a result, the oxidized portion 132 b may beefficiently removed using the tunnel barrier layer 130 as an etch-stoplayer. Although etch byproducts may be produced in the etch process, ashort-circuit may not occur between the top magnetic pattern 132 a andthe bottom magnetic layer 128 because the bottom magnetic layer 128 mayremain covered with the tunnel barrier layer 130.

As previously stated, the inflow rate of the chlorine gas may be equalto about 0.1 to 2.0 percent of the inflow rate of the argon gas. Theamount of the chlorine gas used may be much smaller than that of theargon gas used. Since chlorine gas has a high reactivity, use of asmaller amount of the chlorine gas enables the etch process to have ahigher etchability than an etchability based on chemical reaction. Thebias power of the etch process may be relatively low (from about 30 toabout 70 watts), which may reduce etch damage to the tunnel barrierlayer 130 and/or may enhance an etch selectivity between the oxidizedportion 132 b of the top magnetic layer 132 the tunnel barrier layer 130(as atomic coupling of the oxidized portion 132 b may be weakened byoxygen elements).

The above-described effects may be obtained even if the tunnel barrierlayer 130 is made of magnesium oxide.

The oxidized portion 132 b of the top magnetic layer 132 is removed bymeans of the etch process to expose opposite sidewalls of the topmagnetic pattern 132 a.

The oxidized portion 132 b, i.e., the oxidized ferromagnetic material132 b of the top magnetic layer 132, may have an antiferromagneticproperty. Accordingly, if the oxidized ferromagnetic material 132 bpartially remains on the sidewall(s) of the top magnetic pattern 132 a,the magnetization orientation of the top magnetic pattern 132 a may befixed due to the remaining oxidized ferromagnetic material 132 b. Thus,the property of a magnetic tunnel junction pattern may be lost, whichmay cause a malfunction of a magnetic memory device.

However, according to some embodiments of the invention, the oxidizedportion 132 b of the top magnetic layer 132 may be completely removed bymeans of the etch process to reduce or possibly prevent themagnetization direction of the top magnetic pattern 132 a from becomingfixed on one direction.

Referring to FIG. 7, a mask pattern 137 may be formed on portions of thesemiconductor substrate 100 where the oxidized portion 132 b of the topmagnetic layer 132 has been removed. The mask pattern 137 is provided onthe conductive capping pattern 135 a and the top magnetic pattern 132 a.In particular, in some embodiments, the mask pattern 137 may fully coverthe opposite sidewalls of the top magnetic pattern 132 a. Namely, aplanar area of the mask pattern 137 may be larger than a top surface ofthe conductive capping pattern 135 a. Thus, the mask pattern 137 may beprovided on a portion of the tunnel barrier layer 130 in the vicinity ofthe conductive capping pattern 135 a. Also the mask pattern 137 mayextend laterally over the contact plug 116. The mask pattern 137 may bea photoresist pattern.

Referring to FIG. 8, using the mask pattern 137 as a mask, the tunnelbarrier layer 130, the bottom magnetic layer 128, and the bottomelectrode layer 118 are successively etched to form a bottom electrode118 a, a bottom magnetic pattern 128 a, and a tunnel barrier pattern 130a which are sequentially stacked on the substrate 100. The bottommagnetic pattern 128 a includes a pinning pattern 120 a, a first pinnedpattern 122 a, an inversion pattern 124 a, and a second pinned pattern126 a, which are sequentially stacked on the substrate 100. The bottommagnetic pattern 128 a, the tunnel barrier pattern 130 a, and the topmagnetic pattern 132 a may together form a magnetic tunnel junctionpattern.

A top surface of the tunnel barrier pattern 130 a is larger than abottom surface of the top magnetic pattern 132 a, and the bottommagnetic pattern 128 a has a sidewall aligned with a sidewall of thetunnel barrier pattern 130 a. In addition, the sidewall of the topmagnetic pattern 132 a and the sidewall of the bottom magnetic pattern128 a may be spaced apart from each other.

In an etch process to form the tunnel barrier pattern 130 a and thebottom magnetic pattern 128 a, the conductive capping pattern 135 a maybe provided on the top surface of the top magnetic pattern 132 a and themask pattern 137 may be provided on an exposed sidewall of the topmagnetic pattern 132 a. Therefore, although byproducts may be producedin the etch process to form the patterns 130 a and 128 a, ashort-circuit may not occur between the patterns 132 a and 128 a.

The first and second pinned patterns 122 a and 126 a are ferromagneticpatterns each having a fixed magnetization orientation. Accordingly,magnetic fields generated by the first and second pinned patterns 122 aand 126 a may affect the top magnetic pattern 132 a. The magnetizationorientations of the first and second patterns 122 a and 126 a may beopposite to each other due to the presence of the inversion pattern 124a. Hence, the magnetic fields affecting the top magnetic pattern 132 amay be offset by the first and second pinned patterns 122 a and 126 a.As a result, the top magnetic pattern 132 a may not be affected by themagnetic fields established from the first and second patterns 122 a and126 a. Moreover, the second pinned pattern 126 a may be thicker than thefirst pinned pattern 122 a. Therefore, it may be possible tocounterbalance a magnetic field intensity difference resulting from adifference in distance between the first and second pinned patterns 122a and 126 a and the top magnetic pattern 132 a.

Referring to FIG. 9, the mask pattern 137 is removed. An upperinterlayer dielectric 142 may be formed on a surface of thesemiconductor substrate 100 above the conductive capping pattern 135 aand the MTJ pattern 140. The upper interlayer dielectric 142 mayinclude, for example, silicon oxide.

A top surface of the conductive capping pattern 135 a may be exposed. Away to expose the top surface of the conductive capping pattern 135 a isnow described. The upper interlayer dielectric 142 is planarized down tothe top surface of the conductive capping pattern 135 a. Thus, the topsurface of the conductive capping pattern 135 a is at least partiallyexposed. Alternatively, a contact hole (not shown) may be formed topenetrate the upper interlayer dielectric 142. That is, at least aportion of the top surface of the conductive capping pattern 135 a maybe exposed by the contact hole.

When the top magnetic layer 132 is oxidized, an oxide layer may beformed on the top surface of the conductive capping pattern 135 a. Theoxide layer is removed when the top surface of the conductive cappingpattern 135 a is exposed. That is, the oxide layer formed on the topsurface of the conductive capping pattern 135 a is removed when theupper interlayer dielectric 142 is planarized and/or the contact hole isformed.

Referring to FIG. 10, a bitline 144 is formed on the upper interlayerdielectric 142 to cross over the digit line 110. The bitline 144 iselectrically connected to the exposed conductive capping pattern 135 a.The bitline 144 covers the top magnetic pattern 132 a. The top magneticpattern 132 a is disposed between the bitline 144 and the digit line110. In other words, the top magnetic pattern 132 a is disposed at anintersection of the bitline 144 and the digit line 110. As a result, themagnetization orientation of the top magnetic pattern 135 a may varywith magnetic fields established between the bitline 144 and the digitline 110.

According to some embodiments of the invention, a top magnetic layer isoxidized using a conductive capping pattern as a mask to enhance an etchselectivity between a tunnel barrier layer and a portion where the topmagnetic layer is removed. Thus, an oxidized portion of the top magneticlayer may be efficiently removed using the tunnel barrier layer as anetch-stop layer. Since a bottom magnetic layer is covered with thetunnel barrier layer during an etch process to remove the oxidizedportion of the top magnetic layer, a short-circuit may not occur betweenthe top magnetic pattern and the bottom magnetic layer even if etchbyproducts are produced in the etch process. The oxidized portion of thetop magnetic layer may be fully removed to expose opposite sidewalls ofa top magnetic pattern. The oxidized portion of the top magnetic layer,which has an antiferromagnetic property, may be removed to reduce orprevent degradation in characteristics of the top magnetic pattern.

In the drawings and specification, there have been disclosed typicalembodiments of the invention and, although specific terms are employed,they are used in a generic and descriptive sense only and not forpurposes of limitation, the scope of the invention being set forth inthe following claims.

1. A magnetic memory device, comprising: a first magnetic layer havingopposing sidewalls; a tunnel barrier layer on the first magnetic layer,the tunnel barrier layer having a top surface and having opposingsidewalls aligned with the opposing sidewalls of the first magneticlayer; a second magnetic layer on the tunnel barrier layer, the secondmagnetic layer having a bottom surface that is narrower than the topsurface of the tunnel barrier layer and having opposing sidewalls thatare spaced apart from the opposing sidewalls of the tunnel barrierlayer; and a conductive capping layer on the second magnetic layer, theconductive capping layer having opposing sidewalls aligned with theopposing sidewalls of the second magnetic layer.
 2. The magnetic memorydevice of claim 1, wherein the first magnetic layer comprises a pinninglayer, a first pinned layer, an inversion layer, and a second pinnedlayer, wherein the first and second pinned layers comprise aferromagnetic material, the pinning layer comprises an antiferromagneticmaterial configured to fix a magnetization orientation of the firstpinned layer, and the inversion layer is configured to fix amagnetization orientation of the second pinned layer to be opposite tothe magnetization orientation of the first pinned layer.
 3. The magneticmemory device of claim 2, wherein the tunnel barrier layer comprisesaluminum oxide and/or magnesium oxide.